The present invention relates to a solid-state imaging device having a photoelectric conversion element and a camera.
It is known that, in a solid-state imaging device such as a CCD image sensor and a CMOS image sensor, a crystal defect in a photodiode as a photoelectric conversion element of a light-receiving part and the interface state at the interface between the light-receiving part and an insulating film thereon act as a source of dark current.
As a scheme for suppressing the generation of dark current attributed to the interface state, a buried photodiode structure is effective. This buried photodiode is obtained in the following manner for example. Specifically, an n-type semiconductor region is formed. Subsequently, in the vicinity of the surface of this n-type semiconductor region, i.e., in the vicinity of the interface between the surface and an insulating film thereon, a shallow heavily-doped p-type semiconductor region (hole-accumulating region) for the dark current suppression is formed.
In a general method for fabricating the buried photodiode, ion-implantation of B or BF2 serving as a p-type impurity and annealing treatment are carried out to thereby fabricate the p-type semiconductor region in the vicinity of the interface of the n-type semiconductor region of the photodiode and the insulating film.
In a CMOS image sensor, each pixel includes a photodiode and transistors for various kinds of operation such as reading-out, reset, and amplification. A signal arising from photoelectric conversion by the photodiode is processed by these transistors. Over the respective pixels, an interconnect layer including multilayer metal interconnects is formed. Over the interconnect layer, a color filter that defines the wavelength of light incident on the photodiode and on-chip lenses for condensing light on the photodiode are formed.
As the structures of such a CMOS image sensor, device structures having various characteristics have been proposed.
Specifically, the following various devices have been proposed: a charge modulation device (CMD) obtained by employing CCD-like characteristics for a photoelectric conversion element structure (refer to Japanese Patent No. 1938092, Japanese Patent Laid-open No. Hei 6-120473, and Japanese Patent Unexamined Publication No. Sho 60-140752 (Patent Documents 1, 2, and 3, respectively)) ; a bulk charge modulation device (BCMD) (refer to Japanese Patent Utility Model Laid-open No. Sho 64-14959 (Patent Document 4)); a floating well amplifier (FWA) in which a channel is formed near the surface depending on the charge amount of photo-holes accumulated at the maximal point and the source-drain current changes depending on the charge amount near the surface and consequently reading-out in accordance with the signal charge is permitted (refer to Japanese Patent No. 2692218 and Japanese Patent No. 3752773 (Patent Documents 5 and 6, respectively)); a threshold (Vth) modulation image sensor (VMIS) in which a light-receiving part and a signal detection part separated from each other are disposed adjacent to each other (refer to Japanese Patent Laid-open No. Hei 2-304973, Japanese Patent Laid-Open No. 2005-244434, Japanese Patent No. 2935492, and Japanese Patent Laid-Open No. 2005-85999 (Patent Documents 7, 8, 9, and 10, respectively)).
These CMOS image sensors are front-irradiation solid-state imaging devices that are irradiated with light from the front-face side thereof basically.
On the other hand, there has been proposed a back-irradiation solid-state imaging device (refer to Japanese Patent Laid-open No. 2003-31785 (Patent Document 11)). For this device, the backside of a silicon substrate in which photodiodes and various transistors are formed is polished to decrease the thickness of the substrate, to thereby allow light incidence on the substrate backside for photoelectric conversion.